Full-Duplexing With SDR Devices: Algorithms, FPGA Implementation, and Real-Time Results

In this paper, we present a novel nonlinear digital self-interference canceller algorithm, its implementation details on software-defined radio (SDR) platform, and performance results of real-time full-duplex experiments both device link level. The algorithm is based an augmented Hammerstein model, with part modeling the transmitter non-idealities followed by linear filter to model (SI) channel. includes spline-based for power amplifier, polynomial baseband nonlinearities, as well models I/Q mismatch LO leakage. implemented FPGA OFDM transceiver testbed measurements. Extensive measurements show excellent performance: (1) canceller, together RF isolator, can suppress SI within 1-2 dB's receiver noise floor, total suppression up 103 dB; (2) cancellation 46 dB evidenced, which among highest cancellations in literature; (3) system-level signals demonstrate benefit utilizing proposed two-way communication scenario, showing 90 % increase sum-rate compared half-duplex communication.